Part 1: Diode, and connecting language models to the physical world.
Does LVS not exist for PCBs? Naively everything you describe seems like it should be decomposable to a netlist and checked in that way?
To my knowledge, not really! If there are tools for PCB LVS, they're definitely far less common than IC LVS tools.
This seems crazy to me. How is it that one step “up” from the chip you just lose a powerful validation tool?
Am i being naive here?
Does LVS not exist for PCBs? Naively everything you describe seems like it should be decomposable to a netlist and checked in that way?
To my knowledge, not really! If there are tools for PCB LVS, they're definitely far less common than IC LVS tools.
This seems crazy to me. How is it that one step “up” from the chip you just lose a powerful validation tool?
Am i being naive here?