Why are so many startups developing chip design tools?
Part 2: Silimate and the power of AI in chip design.
Last week, we discussed the blossoming field of startups building EDA and chip design tools. Due to the ever-increasing compute requirements of AI, there is a boom in companies trying to develop custom silicon for accelerating AI workloads. Those companies are trying to compete with industry giants like Nvidia with smaller budgets and fewer engineers; they’re turning to new, powerful tools developed by startups to keep up.
Primitive Instruments, who I featured last week, was tackling the challenge of managing the complex development process of state-of-the-art silicon. But that’s not the only challenge that silicon teams are facing. One of the biggest challenges that AI chip startups face is how fast-moving of a field AI algorithms are.
When Groq made their first silicon in 2019, their 220MB of on-chip SRAM was big enough to store entire models. Now, in 2024, they need racks and racks of chips to run a single state-of-the-art LLM. In 2022, Hailo was lauding convolutional neural networks for computer vision; now, in 2024, vision transformers are state-of-the-art. This challenge is actually personal to me, too; I worked at SambaNova Systems on architectural features to improve convolutional neural network performance. I bet that those features never get used these days.
If AI chip startups want to keep up with fast-moving algorithmic changes, the existing chip design process, and the tools that engineers use, may not be good enough.
AI chip startups need to iterate faster.
This week, I spoke to Ann Wu, the CEO of Silimate. Both of Silimate’s founders have deep technical experience working on chips, so they know this problem extremely well. Ann designed chips at Apple, and worked as a PM at an AI accelerator startup, and her cofounder Akash has a PhD in Electrical Engineering from Stanford.
“Chip design cycles take 12+ months, require hundreds in headcount, and cost millions in development dollars,” Ann told me. “At the same time, we're seeing software workloads evolve rapidly – state-of-the-art LLMs running in data centers have grown 100x in size in the past year alone, and ML models are simultaneously getting miniaturized onto various edge devices. The huge delay between the hardware and software pointers is resulting in severely out-dated/inefficient silicon, and it's only going to get worse.”
Normally, the chip design process follows a “waterfall” structure. An architect defines the spec, then the designers implement that spec, the verification team verifies it, and so forth. This rigid, slow process means that it’s often over a year from when an architecture gets finalized to when the chip actually hits the market. And in the world of AI algorithms, a year is a long time.
According to Ann, “[t]he process of chip design needs to be orders of magnitude faster and more dynamic to keep up with the fast-evolving software workloads.” Given my experience developing AI chips, I’m inclined to agree.
So, how is Silimate going to help silicon teams build hardware quickly enough to keep up with new advances in AI? Well, they’re using AI themselves.
AI can do what legacy EDA can’t.
Silimate is building an AI-powered tool that can autonomously and proactively detect issues with chips. In Ann’s words, “our tools autonomously find and fix functional/PPA (power, performance, area) issues early.”
Normally, a design team completes an entire design iteration before handing their completed design to the physical design and verification team. The physical design (PD) team will ensure that the design meets the necessary power, performance, and area specs, while the verification team ensures that the design meets its functional requirements. Usually, the first version of the design fails on both fronts, and the design team has to iterate with feedback from the PD and verification team.
This is a slow, manual process. PD engineers and verification engineers use specialized software tools that designers aren’t familiar with, which often take hours or even days to run. Silimate’s copilot can help break that slow cycle; as Ann told me, “[w]ith Silimate, chip teams build the right chips faster and more easily.”
In the year since they founded Silimate, Ann and Akash have already shipped the first version of their copilot to world-class chip teams. As a chip designer myself, I can see why customers love what they’re building – automatically finding issues in your design, rather than having to wait for your verification or PD team to help find them for you, makes the process of designing a chip so much easier.
Ultimately, the AI boom has been beneficial to Silimate in a number of ways. The compute required for AI means that there are new startups desperate for powerful tools to give them an edge. The fast-moving nature of AI means that conventional, slow chip design processes can’t keep up. And AI as a technology uniquely enables a product like Silimate to exist. According to Ann: “We're at an inflection point in EDA. New AI techniques enable new and valuable use cases in EDA; we're leveraging this to build a new class of EDA tooling.”
Last but not least, if you think what Silimate is doing is interesting, they’re hiring! If you want to work on using AI to revolutionize the chip industry, I’d recommend checking out their open roles.